Zynq UltraScale+ MPSoC for the System Architect - LIVE ONLINE
This online course provides system architects with an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family.
The emphasis is on leveraging the ARM Cortex-APU, RPU and platform management unit (PMU) capabilities. A separation of protected software tasks is needed when several OS are running in a system securely and safely.
A power-management concept in hard- and software will be demonstrated for getting higher reliability and optimized power consumption.
The theoretical content is supplemented by exercises carried out by the participant.
Duration: 2 mornings of 4 hours each
Times: 9.00 a.m. - 11.00 a.m. Lecture part 1
11.00 a.m. - 11.15 a.m. 15 minute break
11.15 a.m. - 1.15 p.m. Lecture part 2
Exercises: self paced by the participants. Estimated time for completion appr. 2-3 hours. At the end of a lecture, the exercises to be performed by participants are discussed. The results / sample solutions are presented by the trainer the next day.
After registration: the participant receives the presentation documents in electronic form (PDF) as well as the workbook for the exercises, the login data and a list of
requirements to be done in advanced.
- Describe the MPSoC system architecture
- Utilizing power management strategies effectively
- Leveraging the platform management unit (PMU) capabilities
- Running the system securely and safely
- Identifying appropriate boot sequences
- Zynq UltraScale+ MPSoC Architecture Overview
- Hardware-Software Virtualization
- QEMU for Application Devlopment and Debugging
- Isolation for Security and Safety Demands
- Power Management and Platform Mangement using the PMU
- Caching and System Coherency
- DDR Memory Management and QoS
- Booting Concepts
- Boot Loading and Boot Images
- Zynq UltraScale+ MPSoC Ecosystem Support
- Exploring the Architecture of the Zynq UltraScale+ MPSoC
- Bare-Metal Application Development and Debugging
- Linux Application Development and Debugging
- Managing Power for Other Processors
- Exploring AXI Performance
- Boot and Configuration
- XILINX ZYNQ UltraScale+ MPSoC & RFSoC
- Grundlagenkenntnisse Embedded Prozessing
- C oder C++ Programmiererfahrung, einschließlich allgemeiner Debugging-Techniken
Dauer und Kosten
Dauer: 2 Tage (je 4 Stunden)
netto pro Teilnehmer inklusive ausführlicher Schulungsunterlagen
Anleitung herunterladen (PDF)