Versal Power and Board Design - Essentials - LIVE ONLINE
With the powerful Xilinx Versal ACAP device family the system level design requires an approach to create a power system that supports the device’s engines for full capability. This course provides the background to plan designs with these devices based on analysis of the design resource usage. Xilinx provides the tooling and guidance to successfully adopt such designs. The application of the Xilinx XPE power estimator tool will be explained and the lectures also describe the approaches to choosing a suitable package. With these methods a PCB design can be planned for with respect to power supply, decoupling and thermal management, that can be documented in the Versal ACAP Schematic Checklist.
The theoretical content is supplemented by exercises carried out by the participant.
Duration: 2 mornings of 4 hours each
Times: 9.00 a.m. - 11.00 a.m. Lecture part 1
11.00 a.m. - 11.15 a.m. 15 minute break
11.15 a.m. - 1.15 p.m. Lecture part 2
Exercises: self paced by the participants. Estimated time for completion appr. 2-3 hours. At the end of a lecture, the exercises to be performed by participants are discussed. The results / sample solutions are presented by the trainer the next day.
After registration: The participant receives the presentation documents in electronic form (PDF) as well as the workbook for the exercises, the login data and a list of requirements to be done in advanced.
Course Objectives
Provide skills to:
- Efficiently manage power in the ACAP devices
- Leverage Vivado Design Suite XPE tool for power estimation
- Dynamically manage power consumption
Agenda
Versal ACAP Architecture Overview for Xilinx Users
Power and Thermal Solutions Overview
Packaging and Power Integrity
Power Management
Power Supply Background
Designing the Power Supply
PCB Design Verification – Versal ACAP Schematic Checklist
Labs:
Versal Power Calculation with the XPE Tool for Versal ACAPs
Power Estimation from a Design Using the XPE Tool
Versal ACAP Schematic Checklist
Anwendbare Technologien
- AMD Xilinx Versal Adaptive SoCs
- Vivado Design Suite
- Vitis unified software platform
Voraussetzungen
- Familiarity with the Vivado Design Suite
Dauer und Kosten
Dauer: 2 Tage (je 4 Stunden)
Kosten:
1.000,00
€
netto pro Teilnehmer inklusive ausführlicher Schulungsunterlagen