Easy Start FPGA Vivado - LIVE ONLINE
The online training course ”Easy Start FPGA Vivado“ covers the basic approach to the FPGA development cycle. It teaches the participant everything that is necessary to get started. In this workshop, the XILINX design tool Vivado will be used. After a short introduction to the FPGA design techniques and the process of development, this class concentrates on synthesis/ simulation, circuit implementation and startup of the FPGAs.
The theoretical content is supplemented by exercises carried out by the participant.
Duration: 2 mornings of 4 hours each
Times: 9.00 a.m. - 11.00 a.m. Lecture part 1
11.00 a.m. - 11.15 a.m. 15 minute break
11.15 a.m. - 1.15 p.m. Lecture part 2
Exercises: self paced by the participants. Estimated time for completion appr. 2-3 hours. At the end of a lecture, the exercises to be performed by participants are discussed. The results / sample solutions are presented by the trainer the next day.
After registration: The participant receives the presentation documents in electronic form (PDF) as well as the workbook for the exercises, the login data and a list of
requirements to be done in advanced.
- Get familiar with the FPGA design flow and techniques
- Understand how to use the development tools
- Describe the internal structures of FPGAs
- Describe the clocking structure of FPGAs
- Describe the basic concept of VHDL
- Understand how to create Testbenches for simulation
- Understand how to use state machines in VHDL
- Introduction to the FPGA Development Process
- FPGA Design Techniques
- VHDL Synthesis
- Internal Clocking Structures with DCM/ PLLs
- Clock Management MMCM
- Control Engines Implemented as Finite State Machines
- VHDL Simulation
- Implementation of Internal Data Storage
- FPGA development
- FPGA design techniques
- FPGA synthesis
- Internal clocking structures
- control with state machines
- Implementing of memories
- alle FPGA Technologien