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ZYNQ UltraScale + MPSoC System Architecture

Freiburg / Munich

The 2-day workshop will focus on the system architecture of the XILINX Zynq UltraScale+ MPSoC devices.
Starting with the general overview of this technology the next topics showing the details of the hardware architecture and use cases of the Processing System (PS).
Especially the power management with the Platform Management Unit (PMU) in the PS is a new feature of the ZYNQ MPSoC architecture which enable customizable watchdogs and dynamic power optimization.
With several sharing memory ressources the user can configure its access in PS and PL via AXI ports with supported hardware coherency management. As next system-specific features such as System Protection and clock and reset structures discussed.
The DDRAM Controller enables multiple port arbitration, priorization, flow control, and class traffics like Video stream storage.
The boot and configuration process of the Zynq Ultra- Scale+ MPSoC components are discussed in detail. During the individual chapters, various exercises, which are carried out independently by the participants, will be provided.

usable technology



Good understanding of digital embedded systems

Basic knowledge in microprocessor architecture

Basic knowledge in Vivado and SDK Tools

Basic knowledge of the C programming language


15.09.2020 in Freiburg
10.12.2020 in Munich

Duration and Cost

Duartion in days: 2Costs:: € 1.500,00 netto per participant incl. documents


Michael Schwarz

Michael Schwarz

+49 (0) 7664 91313-15


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