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ZYNQ-7000 SoC System Architecture

Frankfurt / Berlin / Freiburg / Munich

This course teaches experienced system architects the knowledge necessary, in order to efficiently take advantage of the new ZYNQ-7000 SoC architecture.
Goal of this two day class is to teach the benefits of the ZYNQ architecture so decisions can be taken easier while working on ZYNQ based projects. The architecture of the ARM Cortex- A9 processor based processing system (PS) and the integration of the programmable logic (PL) are discussed. This allows system architects to use the ZYNQ-7000 device successfully and efficiently.
Topic of explanations are amongst others the different building blocks of the processing system like I/O peripherals, timer, cache, DMA controller, interrupt handling and the memory controller. In this context, the focus is put on efficient usage of the processing system’s DDR controller from an PL point of view, interfacing between PS and PL, design techniques and advantages of implementing functions in either the PS or PL.
To gain more in depth knowledge of the relevant development tools, please refer to the PLC2 PowerWorkshop “Professional ZYNQ-7000 SoC” or the three day courses “Compact ZYNQ-7000 SoC for Hardware Designers” or “Compact ZYNQ-7000 SoC for Software Designers”.


usable technology

XILINX ZYNQ-7000 SoCs


requirements

Basic knowledge of embedded controller

Basic knowledge of FPGA technology

Basic knowledge of the programming languages VHDL and C

Basic knowledge of Vivado Design Suite

Dates


03.02.2020 in Frankfurt
17.06.2020 in Berlin
09.09.2020 in Freiburg
05.11.2020 in Munich

Duration and Cost


Duartion in days: 2Costs:: € 1.500,00 netto per participant incl. documents

Contact


Michael Schwarz

Michael Schwarz

+49 (0) 7664 91313-15
E-Mail

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