For an XILINX/FPGA developer there are two main reasons to learn the Tcl:
- Automate the “Vivado Design-Flows” with Tcl scripting
- “High-Level-Control-Logic” for Linux/ZYNQ-Applications
In both cases, as a precondition some basic (tool-independent) knowledge of Tcl scripting is required. After a short introduction into the essential concepts the first day covers mainly the Tcl syntax and provides an overvier to standard library functions. Frequently “live” examples will be used to practically illustrated the topics covered.
On the second day (which may be optionally omitted – see note below) participants canl try there hands on Tcl themselves in guided practical exercises (with a short, concluding discussion of results). For that purpose participants may choose freely among a set of “micro projects”from the fields listed below:
- General use of Tcl (variables and flow control, string handling, processing files, structuring a program for easy maintenance, extensibility, and testability, ...).
- Using Tcl with Vivado (i.e. concentrating on Vivado commands for “project” and “non- project”-mode, to automate repeated tasks ...)
- Tcl for ZYNQ applications and your own tools augmenting Vivado (classic vs. event-driven architecture, debugtracing, application packaging ...).
The second day may especially be omitted if the plan is to visit the in-depth course “Advanced Vivado-Tcl-Scripting” consecutively, as then there is room for extended practical exercises using Tcl scripting of the Vivado Design flow.. Ot the other hand, if the specific interest is to use Tcl for application development or rapid prototyping on Linux/ZYNQ-based embedded platforms or own, small tools (maybe with using Tk for GUI programming) instead of this (“1+1”-day) workshop we recommend to consider our three-day Tcl/Tk-Workshop.
First day: unspecific; second day: (if Vivado-related microprojects are chosen): 7-series or more recent FPGAs.
Fundamental knowledge of programming and the principals of some high-level programming languages or assembler.
If on the second day Vivado-related micro-projects are of interest, beyond the above sufficient experience with the GUI-based FPGA design flow of Vivado is required.