Professional ZYNQ UltraScale+ MPSoCFreiburg / Frankfurt
This 5-day course will enable the embedded software developer to get the best possible start on software development for the ZYNQ UltraScale+ MPSoC family.
The Power Workshop is a combination of “Compact Zynq UltraScale+ MPSoC for Hardware Designers” and “Compact Zynq UltraScale+ MPSoC for Software Designers” and provides the necessary and in-depth knowledge to understand the entire embedded design cycle for the Zynq UltraScale+ MPSoC and to safely apply the necessary tools.
This first explains the Zynq MPSoC hardware configuration and then the XILINX Software Development Kit (SDK) with multiple methods of the XILINX MPSoC embedded design.
Symmetric and asymmetric OS support, Open-source Linux kernel and rootfs build using Yocto and/or PetaLinux, FreeRTOS usage for the real-time processing unit, Hypervisor architecture and Software Support and at least mechanisms of individual boot configurations are shown and elaborated in exercises.
Debugging in simulation supported by QEMU or debugging on hardware targets - both are important integral parts of methodology. While multiple processors in the UltraScale+ MPSoC architecture are typically not running simultaneously in full performance mode, the power management of ressources is software programmable and so enables power reduction in the run-time system. The last module focusses on Boot topics like first-/second-Stage boot, bitstream loading, multiboot, secure-Boot and the boot image build.
XILINX FPGAs, SoC, MPSoC & RFSoC
Good understanding of digital embedded systems
Basic knowledge of the C programming language