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Migrating to the Vitis Embedded Software Development - LIVE ONLINE

PLC2 ONLINE

This workshop demonstrates the tools and techniques required for software design and development using the Vitis™ unified software platform.
The emphasis of this course is on reviewing the basics of using the Vitis platform, demonstrating the new concepts of Vitis which provides a huge flexible concepts for different approaches of software management for multiple OS, heterogeneous CPU architectures, programmable hardware platform, emulation and new software stacks like machine learning. This course focuses on the software workflow when the programmable design is provided from a Vivado project.

The theoretical content is supplemented by exercises carried out by the participant.
 

Duration: 2 mornings of 4 hours each

Times:    9.00 a.m. - 11.00 a.m.    Lecture part 1

              11.00 a.m. - 11.15 a.m.  15 minute break

              11.15 a.m. - 1.15 p.m.    Lecture part 2

Exercises: self paced by the participants. Estimated time for completion appr. 2-3 hours. At the end of a lecture, the exercises to be performed by participants are discussed. The results / sample solutions are presented by the trainer the next day.

After registration: the participant receives the presentation documents in electronic form (PDF) as well as the workbook for the exercises, the login data and a list of 
requirements to be done in advanced.

Course Objectives:

  • Reviewing the basics of using the Vitis platform
  • Migrating existing SDK projects to the Vitis platform
  • Developing software applications using the Vitis platform

Agenda:

  • Overview of Embedded Software Development 
  • Driving the Vitis Software Development Tool
  • Migrating from SDK to the Vitis Platform
  • Standalone Software Platform Development and BSP management
  • Linux Software Application Development
  • System Debugger in VITS
  • Profiling User Application

Labs

  • Driving a debuggable C/C++ application project using Vitis
  • Standalone Software Platform Development and Coding Support
  • Building a Linux Application in the Vitis IDE
  • System Debugger
  • Profiling Overview

usable technology

Xilinx FPGAs, Zynq SoC, Zynq UltraScale+ MPSoC and RFSoC, ACAP Versal


requirements

C or C++ programming experience, including general debugging techniques

Conceptual understanding of embedded processing systems

Also recommended for Xilinx SDK experienced developers

Dates


25.08.20 in PLC2 ONLINE

Duration and Cost


Duartion in days: 2Costs:: € 1.000,00 netto per participant incl. documents

Contact


Michael Schwarz

Michael Schwarz

+49 (0) 7664 91313-15
E-Mail

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