High-Speed Memory InterfacingBerlin / Munich / Frankfurt
The new Xilinx FPGA platforms allow for very fast interfaces to external memories. They have new IOBs inside the them and optimised wizards are used to generate the memory controller. This results in a shift of implementation challenges from the FPGA to the board level. The very high data rates require special care in the board design domain.
The 3-day workshop “High-Speed Memory Interfacing” targets to FPGA designers, as well as to System Architects and PCB layout designers, who want to implement and operate fast memory interfaces.
This workshop explains the features of the IOBs for memory interfaces. As a result of this, the students learn how to efficiently use these features in interaction with the PCB design. Solutions for signal integrity problems will be discussed. In particular signal quality and timing issues are discussed exhaustively.
Based on evaluation boards with practical design and verification examples are demonstrated. Simulation options get also shown. Moreover, rules for successful realisation of memory interfaces will be commented on.
XILINX 7 Series FPGAs
Virtex- 6 FPGAs
Basic knowledge on VHDL implementation
Basic knowledge on FPGA implementation