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Compact VERSAL Architecture


With VERSAL, XILINX introduces a new chip family with ACAP architecture. ACAP means an Adaptive Compute Acceleration Platform. Integrated ARM processors such as Cortex-A72, Cortex-R5F, higher memory bandwidths, ECC error protection, NOC Network-on-Chip, AI Acceleration and XILINX FPGA architecture– a hardware-accellerated MPSoC architekture. VERSAL offers Hardware Acceleration for processorbased applications, especially for Cloud, Edge, and AI applications. Therefore, new software tools are needed to develop the heterogeneous architecture for hardware accelerated applications SoC. Currently, two families are available with VERSAL Prime and VERSAL AI, with more to follow. Artificial Intelligent Hardware Acceleration becomes essential for Edge and Cloud applications, for which the VERSAL AI derivatives are predestined.
This VERSAL Architecture Workshop is recommended for FPGA developers, software developers and system architects when hardware-accelerating system-on-chip techniques are needed.


usable technology

Versal ACAP


requirements

Basic knowledge of processor architectures

Basic knowledge of FPGA architectures

Dates


on request

Duration and Cost


Duartion in days: 2Costs:: € 1.500,00 netto per participant incl. documents

Contact


Michael Schwarz

Michael Schwarz

+49 (0) 7664 91313-15
E-Mail

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