Compact FPGA 7 Series
The PLC2 workshop “Compact FPGA 7 Series” teaches the first-time or recurring user in the way, the FPGA building blocks of the 7 series devices of XILINX FPGAs work and how they can be used most effectively. The emphasis of this workshop is put on the thorough discussion of the common architectural building blocks of the 7 series devices. After an overview, detailed explanations are given to the functional blocks such as e.g. configurable logic blocks (CLB), I/O blocks (IOB) for system- or source synchronous data transmission in single or double data rate mode, DSP etc. Due to its crucial role in an FPGA design, special attention is given to the clocking resources and clock structure. To top the content off, dedicated hardware resources (such as e.g. GTP and PCIe) will briefly be introduced.
Moreover, suitable coding techniques get explained throughout the class to allow synthesis to produce the best possible implementation results based on the target device’s resources. Exercises help to reinforce the learning process.
Nor the underlying commands of hardware description languages like VHDL nor global implementation strategies for FPGA designs are covered in this class. Please refer to PLC2 workshops like “Compact VHDL” or “Professional VHDL”.
Basic knowledge in VHDL
Basic knowledge in digital design techniques
Basic knowledge of XILINX Design Tool Flow