Order our complete trainingcatalogue

Accelerating C, C++, OpenCL and RTL Applications with SDAccel


SDAccel is a new complete software development environment targeting FPGA platforms that enables a CPU/ GPU-like development experience. Developers can use a familiar workflow to optimize their applications and take advantage of FPGA platforms with little to no prior FPGA experience. The IDE provides coding templates and SW libraries and enables compiling, debugging, profiling, and FPGA emulation on x86 platforms.
This two-day course is structured to help you develop new or existing OpenCL™, C/C++, and RTL applications in the SDAccel™ development environment for use on Xilinx FPGAs. This course also demonstrates how to debug and profile OpenCL API code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources. The focus is on utilizing the tools to accelerate a design at the system architecture level as well as optimize the accelerators.

After completing this comprehensive training, you will have the necessary skills to Examine the OpenCL API execution model, analyze the OpenCL API memory model and to create the kernels.

usable technology

Xilinx 7 Series and UltraScale™ Series FPGAs


Advanced knowledge on XILINX FPGA architectures

Comfort with the C/C++ programming language


21.10.2020 in Freiburg

Duration and Cost

Duartion in days: 2Costs:: € 1.500,00 netto per participant incl. documents


Michael Schwarz

Michael Schwarz

+49 (0) 7664 91313-15


Download as Flyer

PLC2 Design

Flexible, dynamic, individual: Your specific design project determines our workflow.

Plc2 Design