Webinar "Understanding Versal: the AI Engines" -register now-

Understanding Versal: The AI Engines - WEBINAR

This is the fifth webinar of the PLC2 webinar series: Understanding Versal.

The session will focus on the AI Engines in Versal which can be described as a 2D array of RISC 32 Bit processor units.
AI Engine (AIE) tiles consist of a very long instruction word, SIMD, (Single Instruction Multiple Data) vector processor optimized for machine learning and advanced signal processing applications achieving higher throughputs and low latency functions.
We describe the AIE architecture, single instruction and multiple instruction access, and parallelism concepts of the AIE tiles which allow highly fast and efficient offloading of software functions typically from the Scalar Engines (Arm processors) to these engines when acceleration is needed.
The interface architecture will be explained which supports memory private memories, sharing memory accesses, and data streaming to support multiple levels of parallelism.

And - this Versal webinar series will be continued with more topics.

 

Registration:

Register for this webinar for free.

Date:

If the date does not suit you, you still have the possibility to watch this webinar. The webinar will be recorded and available "on demand" afterwards.

Live:

During the webinar you have time to ask questions directly to the trainer.

Language:

The course language is English.


Applicable technologies

  • AMD Xilinx Versal Adaptive SoCs
  • Versal Adaptive SoCs

Requirements

  • none

Dates


19.04.2023 | Online
Booking

Duration & Fee


Duration: 1 hour

Fee: 0.00 €
PLC2 FREE LIVE WEBINAR

Contact


Michael Schwarz