Webinar "Secure Boot Features and Secure Boot Overview for Xilinx Versal ACAP" -register now-

Secure Boot Features and Secure Boot Overview for Xilinx Versal ACAP - WEBINAR

In the beginning of this session the security core functions will be described that support encryption and decryption, authentication, and key management. The differences of Asymmetric Hardware Root-of-Trust (A-HWRoT) and Symmetric Hardware Root-of-Trust (S-HWRoT) are explained. We talk about the hardware cryptographic blocks, the secure software library and building trusted firmware images. Attendees will get an overview of the primary and secondary boot modes and sources, identify the boot phases and flows and the process for generating a secure boot image. The two boot flows in the Versal ACAP architecture of secure and non-secure will be compared. And in the last part of the session example configurations of the secure boot image creation will be shown.

 

Registration:

Register for this webinar for free.

Date:

If the date does not suit you, you still have the possibility to watch this webinar. The webinar will be recorded and available "on demand" afterwards.

Live:

During the webinar you have time to ask questions directly to the trainer.

Language:

The course language is English.


Applicable technologies

  • Acceleration and AI
  • FPGA technologies
  • XILINX Versal ACAP

Requirements

  • none

Dates


29.06.2022 | Online
Booking

Duration & Fee


Duration: 1 hour

Fee: 0.00 €
PLC2 FREE LIVE WEBINAR

Contact


Michael Schwarz