The PLC2 workshop “Professional FPGA” teaches the beginner or returning user how the building blocks of a Spartan/Virtex device work and in which way the available resources can optimally be used. This class emphasizes the description of the fundamental architectural elements of the recent Spartan/Virtex FPGA technologies. After an initial overview, a detailed discussion of the different functional blocks such as for example the Configurable Logic Block (CLB), I/O-Block (IOB) for source- and system synchronous signal transmission in single or double data rate modes, DSP etc.
Naturally, due to its special importance, the clock distribution system gets discussed in-depth. Moreover dedicated hardware blocks (e.g. GTP and PCIe) get briefly discussed. Besides, adapted coding techniques are a topic, to get the most possible out of synthesis by using optimum coding for the target technology. The underlying instructions of the programming language VHDL as well as the standard proceeding for implementing a FPGA design are not topic of this workshop. Please refer to “Compact VHDL” or “Professional VHDL”
The theory is complemented with PC based exercises.
- UltraScale/UltraScale+ Technologies
- Basic knowledge of XILINX Design Tool Flow
- Basic knowledge in VHDL
- Basic knowledge in digital design techniques