Webinar "Understanding Versal: The Adaptable Engines" -register now-

Designing with RF Data Converters

The new XILINX Zynq UltraScale+ RFSoC devices allow very fast data converter interfaces.
This 3-day course starts with a description of the new RFSoC family in general. You will enumerate the key elements of the RFSoC devices and you will identify typical applications for the data converters.
This course provides a deep discussion of the architecture and functionality of the data converters. You will learn how to utilize the data converter by configuration, simulation and implementation.
The RF design at PCB level is very challenging. In this course, you will learn the PCB level design requirements. The realization options for a successful PCB design will be discussed deeply.
Additionally, this course describes the architecture and functionality of the SD-FEC hard IP. You will learn how to utilize the SD-FEC IP by configuration and simulation.

Applicable technologies

  • Zynq UltraScale+ RFSoC


  • Basic familiarity with forward error correction terms and principles
  • Basic knowledge on Zynq UltraScale+ MPSoC hardware and software design
  • Basic familiarity with data converter terms and principles


06.02.2023 | Berlin
22.05.2023 | Freiburg

Duration & Fee

Duration: 3 days

Fee: 2,100.00 €
net per person including detailed training material, beverages during breaks and lunch


Michael Schwarz