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Compact ZYNQ UltraScale+ MPSoC for SW Designers

This 3-day course will enable the software developer to get the best possible start on software development for the ZYNQ UltraScale+ MPSoC family.
The course first explains the Zynq MPSoC architecture and then the XILINX Software Development Kit (SDK) with multiple methods of the XILINX MPSoC embedded design. Symmetric and asymmetric OS support, Open-source Linux kernel and rootfs build using Yocto and/or PetaLinux, FreeRTOS usage for the real-time processing unit, Hypervisor architecture and Software Support and at least mechanisms of individual boot configurations are shown and elaborated in exercises.
Debugging in simulation supported by QEMU or debugging on hardware targets – both are important integral parts of methodology.
While multiple processors in the UltraScale+ MPSoC architecture are typically not running simultaneously in full performance mode, the power management of ressources is software programmable and so enables power reduction in the runtime system.


Applicable technologies

  • XILINX ZYNQ UltraScale+ MPSoC & RFSoC

Requirements

  • Good understanding of digital embedded systems
  • Basic knowledge of the programming language C

Dates


15.11.2021 | Freiburg
Booking

Duration & Fee


Duration: 3 days

Fee: 2,100.00 €
net per person including detailed training material, beverages during breaks and lunch

Contact


Michael Schwarz