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Compact FPGA Circuit Design Technique

For the successful implementation of the digital circuits in the FPGA, the strong knowledge of the digital circuit’s basics is mandatory. The HDL based developing method simplifies the developing cycle but for that developer must have the good knowledge of digital circuit design. Although most of developer basically knows the digital components like combinational and sequential and there usage but some of their knowledge got lost due to time or some developer have not learned e.g. that’s the fact when software programmer has to develop FPGA’S without special previous knowledge.
The three days workshop “Compact FPGA Circuit Design Techniques” gives the FPGA developers a solid and detailed knowledge in the area of digital circuit techniques. Furthermore the arithmetic operations and their implementation will be discussed in detail after this we will discuss examples of combination circuits like encoder, decoder, and multiplexer. Moreover the RTL design techniques will be presented with the RTL components like counters, frequency generators etc. The errors which can be occur during clock generation and clock distribution will be discussed in brief. In the next section we will see the implementation of digital circuits with the memory devices like RAM’S, ROM’S etc. The final section consists of brief introduction to the XILINX FPGA’S as target device for implementation of digital circuits.

Applicable technologies

  • All kind of FPGA technologies


  • none


on request

Duration & Fee

Duration: 3 days

Fee: 2,100.00 €
net per person including detailed training material, beverages during breaks and lunch


Michael Schwarz

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