AXI Interface Technology
For many years, IP cores were equipped with supplier and application specific hardware interfaces. This is how the interface standard ARM-AXI has become established and is available for almost all IP cores now.
Being used well beyond the traditional processor context most peripheral blocks, DSP algorithm IPs and basic hardware cores such as e.g. FIFOs can nowadays be created with an AXI interface.
This workshop teaches fundamental knowledge of the standard and the methods required, in order to write and verify your own standard conform hardware component. Since many technology suppliers are involved in the standardisation process, the number of available IP cores provided by 3rd parties has increased significantly. The AMBA protocol is shown along with a discussion, how AXI allows for FPGA implementation and an optimal configuration of the interface signals. Expert knowledge is required to create performing and resource efficient AXI components, since many aspects have to be taken into account.
Exercises based on real world examples help to consolidate the protocol and expert level knowledge.
- XILINX FPGAs, SoC, MPSoC & RFSoC
- Knowledge of the FPGA technology
- Knowledge of Xilinx design tool flows
- Basic knowledge of VHDL
Duration & Fee
Duration: 2 days
netto pro Teilnehmer inklusive ausführlicher Schulungsunterlagen sowie Pausengetränke und Mittagessen
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