In order to shorten the training and design time for FPGA developers, a new PLC2 Shorties series was developed by the FPGA training and design specialist PLC2 GmbH.
Under the motto "I've always wanted to know this ..", experienced trainers provide typical tasks appropriate solutions which will be developed in close cooperation with the participants.
From the abundance of frequently asked questions that have been brought up to us in the past decades, we have a representative selection made with the aim of effectively supporting the FPGA developers in solving these tasks. The offer ranges from hardware design and verification to complex topics in the area of embedded applications.
PLC2 Shorties series is continuously updated and expanded.
When designing the new series, we focused on practical implementation, the theory only becomes fundamental treated. Starting with the general definition, the requirements are derived and the solution implemented. Whenever possible the implementation is shown on a corresponding evaluation board.
We‘re keeping the bar high in this rapid market. Our team solves your questions and provides you with solutions on point!
Upcoming PLC2 Shorties:
title | date |
Design, Constraining and Verification of Low Speed and High Speed ADC Interfaces | 17.07.2020 |
Design, Constraining and Verification of Low Speed and High Speed DAC Interfaces | 31.07.2020 |
Debugging Multi-Core Designs using Vitis & Cross-Triggered based Debugging using Zynq US+/MPSoC | 28.08.2020 |
Migrating a Vivado SDK - Project to Vitis Unified Software Plaform | 11.09.2020 |
OSVVM - New Verification IPs | 25.09.2020 |